Current mainstream semiconductor memories in both embedded and standalone applications include static random access memory (SRAM), dynamic random access memory (DRAM), and nonvolatile Flash memories (NAND and NOR). SRAM is fast, but large and volatile. DRAM is small, has medium speed, but is volatile. Consequently, DRAM requires a refresh to retain the data stored in the memory. Flash memory is the smallest, has a medium speed and nonvolatile.
Magnetic memories, particularly magnetic random access memories (MRAMs) have drawn increasing interest as alternatives to semiconductor memories. Magnetic memories have their potential for high read/write speed, excellent endurance, non-volatility and low power consumption during operation. An MRAM can store information utilizing magnetic materials as an information recording medium. Typically, a conventional magnetic element is used for storing data in such magnetic memories.
FIG. 1 depicts a conventional magnetic element 10, which may be a conventional magnetic tunneling junction (MTJ) or a conventional spin valve. The conventional magnetic element 10 may be used in a conventional magnetic memory. In memory applications, the conventional magnetic element 10 is typically a conventional MTJ. The conventional MTJ 10 typically resides on a substrate (not shown), uses seed layer(s) 11 and includes a conventional antiferromagnetic (AFM) layer 12, a conventional reference layer 14, a conventional barrier layer 16, a conventional free layer 18, and a conventional capping layer 20.
The spacer layer 16 is nonmagnetic. The spacer layer 16 may be a tunneling barrier layer, for example a thin insulator, or a conductor. If the spacer layer 16 is a barrier layer, then the conventional magnetic element 10 is a MTJ. If, however, the conventional spacer layer 16 is conductive, then the conventional magnetic element is a spin valve. The conventional capping layer 20 is typically used to provide protection for the underlying layers 11, 12, 14, 16, and 18. The conventional seed layer(s) 11 are typically utilized to aid in the growth of subsequent layers, such as the antiferromagnetic layer 12, having a desired crystal structure.
The conventional reference layer 14 and the conventional free layer 18 are ferromagnetic. Typically, materials containing Fe, Ni, and/or Co such as FeCo, FeCoB, Permalloy, Co, are used in the conventional reference layer 14 and the conventional free layer 18. The conventional free layer 18 has a changeable magnetization 19 and may have an easy axis established by shape anisotropy and/or crystalline anisotropy in plane or crystalline anisotropy out-of-plane. The easy axis of the conventional free layer 18 is typically such that the free layer magnetization 19 is parallel (P state) or antiparallel (AP state) with the magnetization 15 of the conventional reference layer 14. In contrast to the conventional free layer 18, the magnetization 15 of the conventional reference layer 14 is stable throughout use of the magnetic element 10. For example, the magnetization 15 would be stable at room and operating temperatures. The magnetization 15 of the conventional reference layer 14 is fixed, or pinned, in a particular direction, typically by an exchange-bias interaction with the AFM layer 12. Although depicted as simple (single) layers, the reference layer 14 and free layer 18 may include multiple layers. For example, the reference layer 14 and/or the free layer 18 may be a synthetic layer including ferromagnetic layers antiferromagnetically or ferromagnetically coupled through a thin conductive layer, such as Ru. In such a synthetic layer, multiple layers of CoFeB interleaved with a thin layer of Ru may be used for the conventional reference layer 14 and/or the conventional free layer 18. Further, other versions of the conventional magnetic element 10 might include an additional reference layer (not shown) separated from the free layer 18 by an additional nonmagnetic barrier or conductive layer (not shown).
Data, such as a logical “1” or “0”, typically corresponds to the magnetization 19 of the free layer 18 being in the P state or the AP state, respectively. Thus, data are written by setting the free layer 18 in the P state or the AP state. For some conventional magnetic elements 10, this is accomplished by applying an external magnetic field, for example using one or more current-carrying lines.
FIG. 2 depicts a portion of a conventional magnetic memory 30 that utilizes a magnetic field to write data. The conventional magnetic memory 30 utilizes the conventional magnetic element 10 depicted in FIG. 1 in order to store data. Referring to FIGS. 1 and 2, in the magnetic memory 30, the conventional magnetic element 10 is represented as a resistance. The conventional magnetic memory 30 includes a magnetic storage cell including the conventional magnetic element 10 and a selection transistor 34. The selection transistor 34 is typically an NMOS device, but may also be a PMOS device. Also shown are bit line 36, word line 38, source line 40 and write word line 42. In order to write to the conventional magnetic element, a current is driven through the bit line 36 and the write word line 42. Typically, the conventional magnetic element 10 resides at cross points of the bit line 36 and write word line 42. When write currents are driven through both lines 36 and 42, the magnetic field at the conventional magnetic element 10 is sufficient to change the magnetization 19 of the free layer 18. Thus, data may be written to the conventional magnetic element 10. In order to read the data from the conventional storage cell 32, the word line 38 is activated to turn on the selection transistor 34. A read current is driven between the bit line 36 and the source line 40. The resistance of the conventional magnetic element 10 can be ascertained and, therefore, the state of the conventional magnetic element 10 determined.
In certain situations, the conventional magnetic element 10 may also be written using the spin transfer torque. In general, the spin transfer torque may be used for magnetic elements having lateral dimensions on the order of a few hundred nanometers or less. In spin transfer torque switching, a spin polarized conduction current is used directly to switch the magnetization of the conventional magnetic element 10. FIG. 3 depicts a portion of a conventional magnetic memory 30′ that may be switched using spin transfer torque. Portions of the conventional magnetic memory 30′ are analogous to the conventional magnetic memory 30 and are, therefore, labeled similarly. The conventional magnetic memory 30′ utilizes the conventional magnetic element 10 depicted in FIG. 1 in order to store data. Referring to FIGS. 1 and 3, in the magnetic memory 30′, the conventional magnetic element 10 is represented as a resistance. The conventional magnetic memory 30′ includes a magnetic storage cell 32′ including the conventional magnetic element 10 and a selection transistor 34′. Also shown are bit line 36′, word line 38′, and source line 40′.
In order to write to the conventional magnetic element, the word line 38′ is activated to allow current to be driven through the magnetic element 10 and the selection transistor 34′. The write current is bidirectional in nature. Current driven from the bit line 36′ to the source line 40′ sets the magnetization direction of the free layer 18 in a first direction. For reverse writing, current is driven in the opposite direction (from the source line 40′ to the bit line 36′ and sets the magnetization 19 of the free layer 18 in the opposite direction. Thus, data may be written to the conventional magnetic element 10 using bidirectional write currents. In order to read the data from the conventional storage cell 32′, the word line 38′ is activated to turn on the selection transistor 34′. A read current is driven through the bit line 36′, the conventional magnetic element 10 and selection transistor 34′. The resistance of the conventional magnetic element 10 can be ascertained and, therefore, the state of the conventional magnetic element 10 determined.
Use of the conventional magnetic memory 30′ and spin transfer torque may allow a lower write current to be used than the conventional magnetic memory 30. In particular, the spin transfer torque depends upon the current density through the conventional magnetic element 10. As the conventional magnetic element 10 decreases in size, the current through the magnetic element can decrease in size while maintaining a sufficient current density for spin transfer torque switching. Consequently, a spin transfer torque-based memory, such as the conventional memory 30′ may be scalable to higher densities.
Although the memory 30′ functions, one of ordinary skill in the art will recognize that the current through the magnetic storage cell 32′ is not the same for writing to either state. FIG. 4 depicts another conventional memory 30″ that uses spin transfer torque switching and which has greater current available for reverse writing. Portions of the conventional magnetic memory 30″ are analogous to the conventional magnetic memories 30/30′ and are, therefore, labeled similarly. The conventional magnetic memory 30″ utilizes the conventional magnetic element 10 depicted in FIG. 1 in order to store data. Referring to FIGS. 1 and 4, in the magnetic memory 30″, the conventional magnetic element 10 is represented as a resistance. The conventional magnetic memory 30″ includes a magnetic storage cell 32″ including the conventional magnetic element 10. However, the conventional magnetic storage cell 32″ includes two selection transistors 34A and 34B. One of the selection transistors 34A is an NMOS transistor, while the other selection transistor 34B is a PMOS transistor. The pair of selection transistors 34A and 34B are used to aid in providing a larger reverse write current (from the magnetic element 10 to the bit line 36″). Also shown are bit line 36″, word lines 38A and 38B, and source line 40″. In order to write to the conventional magnetic element 10, current is driven either from the bit line 36″ to the source line 40″ or vice versa.
Although the memories 30′ and 30″ may use lower write current than the conventional magnetic memory 30, one of ordinary skill in the art will recognize that there are drawbacks to scaling the memories 30′ and 30″ to higher densities. For example, it is desired for the magnetic memories 30′ and 30″, it is desirable for the magnetic memory to have the potential to be dense (˜10 F2), fast (sub 10 ns read and write), and operate at low power. Thus, it may be desirable to for the memories 30′ and 30″ to be able to or have the potential to function at CMOS logic nodes such as 65 nm, and show a clear potential for future nodes such as 45 nm, 32 nm and beyond. The memories 30′ and 30″ may face issues in achieving these goals.
For the magnetic memory 30′, the current available for writing not symmetric for forward and reverse writing. The magnetic memory 30″ has more symmetric write currents. However, because of the inclusion of two transistors 34A and 34B and the use of a larger PMOS transistor as one of the transistors 34A and 34B, the size of the magnetic storage cell 32″ may be significantly larger. For the conventional magnetic element 10 in the memories 30′/30″, thermal stability of the magnetization 19 for the conventional free layer 18 may be provided by shape anisotropy. However, this thermal stability is related to the critical current density (current density required to switch the magnetization direction using spin transfer torque). For a conventional magnetic element 10 having a sufficient thermal stability factor (KuV/kBT), believed to be approximately fifty-five, the critical current density may be large. A high voltage and current for a sufficient current density that may be required for thermally stable writing of the conventional magnetic element 10 at higher densities may be difficult to achieve for the magnetic storage cell 32′. Thus, there may be limitations to scaling conventional spin transfer torque based memories 30′ and 30″ to higher densities.
Another type of memory that has been developed is phase change based memory. Phase change memories utilize a current to heat a phase change material. Based upon the pulse used, the phase change material may be toggled between phases. For example, heating induced by a current pulse may change an amorphous insulator phase to a crystalline conductor phase. A higher current pulse having a shorter duration may be used to reset the memory to the amorphous insulator phase. Further, because heating is used, the direction of current is apparently unimportant to the phase change material. As a result, phase change memory may utilize smaller components, such as transistors or diodes, that accommodate unidirectional current. Although phase change memories may be made smaller, one of ordinary skill in the art will recognize that phase change memories are relatively slow in comparison to conventional spin transfer torque based memories 30′ and 30″.
Accordingly, what is needed is a method and system that may improve the ability of the spin transfer torque based memories to be scaled to higher densities. The method and system address such a need.